What DCI is and how it arrives
DCI is carried on the PDCCH in a CORESET, addressed to the UE's C-RNTI (or other RNTI). The UE decodes it using blind decoding — exactly the same process as finding the SIB1 scheduling DCI, but now using its dedicated C-RNTI instead of SI-RNTI.
Each DCI format serves a specific purpose. Some schedule downlink data, some grant uplink resources, some configure power control. The format is not explicitly signalled — the UE infers it from the decoded bit count and the RNTI used.
| Format | Direction | Purpose | Key RNTI |
|---|---|---|---|
| 0_0 | UL ↑ | PUSCH scheduling — fallback (compact) | C-RNTI, TC-RNTI |
| 0_1 | UL ↑ | PUSCH scheduling — normal (full features) | C-RNTI |
| 0_2 | UL ↑ | PUSCH scheduling — compact for URLLC | C-RNTI |
| 1_0 | DL ↓ | PDSCH scheduling — fallback (SI, paging, RAR) | C-RNTI, SI-RNTI, P-RNTI, RA-RNTI |
| 1_1 | DL ↓ | PDSCH scheduling — normal (full features) | C-RNTI ← most common for data |
| 1_2 | DL ↓ | PDSCH scheduling — compact for URLLC | C-RNTI |
| 2_0 | — | Slot format indicator (SFI) for TDD | SFI-RNTI |
| 2_1 | — | PRE-emption indicator | INT-RNTI |
| 2_3 | — | UL transmit power control | TPC-PUSCH-RNTI |
DCI Format 1_1 — downlink data scheduling
This is the most important DCI format for connected UEs receiving data. It tells the UE exactly which time-frequency resources carry its PDSCH, what MCS to use for decoding, and which HARQ process to use.
| Field | Bits | Our value | Meaning |
|---|---|---|---|
| Identifier for DCI | 1 | 1 | Downlink DCI |
| Freq domain resource | varies | 0b001111100 | RBs 16–52 (37 RBs allocated) |
| Time domain resource | 4 | 0b0010 = 2 | Slot offset K0=0, symbols 2–13 (12 symbols) |
| VRB-to-PRB mapping | 1 | 0 | Non-interleaved |
| MCS (PDSCH) | 5 | 0b10100 = 20 | 256-QAM, code rate 0.75 |
| NDI | 1 | 1 | New data indicator (new TB) |
| Redundancy version | 2 | 00 | RV=0 (first transmission) |
| HARQ process number | 4 | 0b0011 = 3 | HARQ process 3 |
| Antenna ports | 4 | 0b0000 | 1 layer, port 1000 |
| TPC for PUCCH | 2 | 00 | 0 dB power adjustment |
| PUCCH resource indicator | 3 | 000 | HARQ-ACK on PUCCH resource 0 |
| PDSCH-to-HARQ timing | 3 | 0b010 = 2 | ACK/NACK 2 slots after PDSCH |
Frequency domain resource assignment
The frequency resource field uses Resource Indicator Value (RIV) encoding to compactly represent a contiguous allocation of RBs within the active BWP. For our allocation of RBs 16–52 (37 RBs starting at RB 16):
// RIV formula: // If (L_RBs - 1) ≤ floor(N_BWP_size / 2): RIV = N_BWP_size × (L_RBs - 1) + RB_start = 52 × (37 - 1) + 16 = 52 × 36 + 16 = 1872 + 16 = 1888 // In binary: 1888 = 11101100000 (11 bits for 52-RB BWP) // → fits in the freq domain resource field // Reverse: given RIV=1888, recover allocation: L_RBs = ⌊RIV / N_BWP_size⌋ + 1 = ⌊1888/52⌋ + 1 = 36 + 1 = 37 RB_start = RIV mod N_BWP_size = 1888 mod 52 = 16
Time domain resource assignment
The 4-bit time domain field is an index into a table defined in TS 38.214 Table 5.1.2.1-1. Each row defines a slot offset K0 (how many slots after the DCI to start PDSCH) and the symbol allocation (start symbol S and number of symbols L).
// Table 5.1.2.1-1, row 2 (0-indexed): K0 = 0 ← PDSCH in same slot as DCI S = 2 ← start symbol 2 (after DMRS) L = 12 ← 12 symbols SLIV = S×(14−L+1) + (L−1) if (L−1) ≤ 7 → SLIV = 2×3 + 11 = 17 // Summary: PDSCH occupies symbols 2–13 of the current slot // 12 symbols × 37 RBs × 12 SC = 5,328 resource elements // After removing DMRS (every 4th SC in symbol 2): // Net data REs ≈ 4,884 (after DMRS overhead)
MCS table — modulation and code rate
The 5-bit MCS field indexes into one of three MCS tables (64-QAM, 256-QAM, or low-spectral efficiency). Which table to use is configured by RRC. For our UE in good signal conditions, Table 2 (256-QAM) is used.
| MCS index | Modulation | Code rate (×1024) | Spectral eff. |
|---|---|---|---|
| 0 | QPSK | 120 | 0.23 bps/Hz |
| 5 | QPSK | 378 | 0.74 bps/Hz |
| 10 | 16-QAM | 330 | 1.29 bps/Hz |
| 15 | 64-QAM | 378 | 3.70 bps/Hz |
| 20 ← ours | 256-QAM | 766 | 5.99 bps/Hz |
| 25 | 256-QAM | 948 | 7.41 bps/Hz |
| 27 | 256-QAM | 948 | 7.41 bps/Hz |
// Data REs per slot: REs = 37 RBs × 12 SC × 12 symbols − DMRS overhead ≈ 4,884 // Bits per slot: bits = REs × modulation_order × code_rate = 4,884 × 8 (256-QAM) × 0.748 (rate 766/1024) = 29,222 bits/slot // Throughput (2 slots per ms, 30 kHz SCS): Mbps = 29,222 × 2000 slots/s / 1,000,000 = ~58 Mbps DL